Description
| Part.No | Frequency Range
f (MHz) |
Phase locked phase noise
SΦ (dBc/Hz) (fm=1kHz/100kHz) 100MHz/12V Typ |
Lock detect port | Voltage
(V) |
Output |
| PLX36 Series | 10～100 | -135/-150 | optional | 12/5 | SINE/TTL/HCMOS |
| PLX50x Series | 10～140 | -155/-165 | optional | 12/15 | SINE |
| Typical input signal requirements (reference): input frequency 10MHz, input power 0～5dBm, phase noise -135dBc/Hz@1kHz. Accept customization according to user requirements. | |||||
| Functions and packages customizable according to user requirements. | |||||
| Note: PLX36 Series generally uses VCXO; PLX50x Series generally uses low Phase noise VCOCXO. | |||||